Parasitic Substrate Couplings in High Voltage Integrated Circuits
Parasitic Substrate Couplings in High Voltage Integrated Circuits2018
Pietro Buccella, Camillo Stefanucci, Maher Kayal, Jean-Michel Sallese
Details
- First published
- 2018
- OL Work ID
- OL27394083W
Subjects
Integrated circuitsElectronic circuits