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Verification techniques for system-level design

Verification techniques for system-level design2008

Mukul Prasad, Indradeep Ghosh, Masahiro Fujita, Masahiro Fujita

Details

First published
2008
OL Work ID
OL12370312W

Subjects

Formal methods (Computer science)TestingVerificationIntegrated circuitsSystems on a chipCircuits & componentsElectrical engineeringTechnology & EngineeringTechnology & Industrial ArtsScience/MathematicsElectricityElectronics - Circuits - IntegratedElectronics - MicroelectronicsNonfictionTechnology / Engineering / ElectricalFormal methods (Computer science)Integrated circuitsSystems on a chip

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